Vias and Interconnects

This article concerns the Signal Integrity (SI) analysis of a multi-layered package imported from Cadence® Allegro® via the CST Cadence Link. The typical workflow for setting up and simulating such models in CST MICROWAVE STUDIO® (CST MWS) as well as in CST DESIGN STUDIO™ (CST DS) are presented. Simulated results correlate well with measurements. Read full article..

John Contreras and Al Wallash, Hitachi Global Storage Technologies, presentation at the 5th North American Userforum, 2008. Read full article..

This article presents the use of CST MICROWAVE STUDIO® (CST MWS) for the simulation of large IC packages. From the time domain simulation network parameters can be extracted and further processed in CST DESIGN STUDIO™. Read full article..

This article is concerned with the important issue of Signal Integrity and the application of CST MICROWAVE STUDIO® to the investigation of the characterisation of an SMA connector on a multi-layer PCB. Read full article..

This article demonstrates how CST MICROWAVE STUDIO® has been applied to the Signal Integrity analysis of a multilayer PCB structure. Good agreement with measurement is shown as well as the results for a design suggestion to reduce coupling between planes. Read full article..

An overview is given of the capabilities of the Cadence Allegro import feature in the CST STUDIO SUITE™. The user has full control over the layout export in Cadence itself and during the import process in CST STUDIO SUITE™. Cross-section and packaging export facilitites mean that layers, dies, and bond wires can be specified in the process. The imported structure is also subjected to an automatic cleaning and healing process to ensure an efficient simulation process. Depending on the size, complexity and required results, either the CST Time-Domain Solver or the Frequency Domain Solver may be used to establish the signal integrity of such layouts. Read full article..

A portion of a backplane, designed with the Cadence Allegro® layout tool, is imported into CST MICROWAVE STUDIO®. This section consists of a differential pair with vias which go through the board. The structure was analyzed in Microwave Studio. The simulation results demonstrate the impact of backdrilling the signal vias to improve the signal integrity performance. A detailed SPICE model of the transmission path is created and its accuracy is verified. Read full article..

This article summarises the simulation of a System-in-Package (SiP) model using the CST MICROWAVE STUDIO® (CST MWS) Transient Solver to determine the S-Parameters, field distribution and system response when excited with 10 and 20 GHz pulses with additional noise signals. An analysis of the SiP with a board mounting and its effect on the is resonant frequency is also performed. The EMC behaviour of the SiP with and without the mounted board is also considered. Permission and courtesy of AET Inc. Japan. Read full article..

In this article the simulation of parasitic effects in a standard IC package is shown. The transient simulator in CST MICROWAVE STUDIO® (CST MWS) offers the advantage, that effects such as crosstalk and signal delay can be investigated in both time and frequency domain. Additionally, the simulation results can be used to generate an equivalent RLC network model that has the same S-Parameters as the 3D EM simulation but can be included in the overal circuit simulation of the logical parts of the IC. Read full article..

This example shows the simulation of a conductor backed coplanar waveguide with a ground via fence for reducing EMI radiation. The excellent agreement between simulation and simulated results can be observed. Read full article..